Development. Second ethernet PHY IC support. part 1.

In last (I hope) revision of OpenWrt driven SoM module we added second ethernet PHY IC to increase functionality of module.

Changes made in hardware:

  • shared MDIO interface between two PHY IC (KSZ8081RNAIA);
  • RESET pin routed from each IC to Microprocessor.
  • CRS_DV pin of each IC pulled up/down to make PHY address for one IC – 0x00, for another IC – 0x03;

Surprisingly non of IC started to work. After powering the module non of PHY IC takes IP address via DHCP. We removed second PHY from PCB to be sure that second IC doesn’t affect first one, removed CRS_DV pull up resistor, cut RST trace from PHY to MCU. Unfortunately PHY IC didn’t start to work. Looks like IC schematic/routing became similar to previous (working) PCB revision but still no link (no IP address taking via DHCP). Magic?

Here we describe steps we passed through troubleshooting process trying to get two working ethernet interfaces.

Step 1. Logs.

Here logs of previous revision of device:

root@OpenWrt:/# dmesg | grep Micrel
[ 7.603137] Micrel KSZ8081 or KSZ8091 2188000.ethernet-1:00: attached PHY driver [Micrel KSZ8081 or KSZ8091] (mii_bus:phy_addr=2188000.ethernet-1:00, irq=POLL)
[ 27.429222] Micrel KSZ8081 or KSZ8091 2188000.ethernet-1:00: attached PHY driver [Micrel KSZ8081 or KSZ8091] (mii_bus:phy_addr=2188000.ethernet-1:00, irq=POLL)
root@OpenWrt:/# dmesg | grep fec
[ 0.673874] fec 2188000.ethernet: 2188000.ethernet supply phy not found, using dummy regulator
[ 0.677218] libphy: fec_enet_mii_bus: probed
[ 0.681990] fec 2188000.ethernet eth0: registered PHC device 0
[ 9.648655] fec 2188000.ethernet eth0: Link is Up – 100Mbps/Full – flow control off
[ 29.607205] fec 2188000.ethernet eth0: Link is Up – 100Mbps/Full – flow control off
root@OpenWrt:/# dmesg | grep eth
[ 0.673874] fec 2188000.ethernet: 2188000.ethernet supply phy not found, using dummy regulator
[ 0.681990] fec 2188000.ethernet eth0: registered PHC device 0
[ 7.603137] Micrel KSZ8081 or KSZ8091 2188000.ethernet-1:00: attached PHY driver [Micrel KSZ8081 or KSZ8091] (mii_bus:phy_addr=2188000.ethernet-1:00, irq=POLL)
[ 7.603713] IPv6: ADDRCONF(NETDEV_UP): eth0: link is not ready
[ 9.648655] fec 2188000.ethernet eth0: Link is Up – 100Mbps/Full – flow control off
[ 9.648733] IPv6: ADDRCONF(NETDEV_CHANGE): eth0: link becomes ready
[ 27.429222] Micrel KSZ8081 or KSZ8091 2188000.ethernet-1:00: attached PHY driver [Micrel KSZ8081 or KSZ8091] (mii_bus:phy_addr=2188000.ethernet-1:00, irq=POLL)
[ 27.429448] IPv6: ADDRCONF(NETDEV_UP): eth0: link is not ready
[ 29.607205] fec 2188000.ethernet eth0: Link is Up – 100Mbps/Full – flow control off
[ 29.607586] IPv6: ADDRCONF(NETDEV_CHANGE): eth0: link becomes ready
root@OpenWrt:/# dmesg
…..
[ 27.429222] Micrel KSZ8081 or KSZ8091 2188000.ethernet-1:00: attached PHY driver [Micrel KSZ8081 or KSZ8091] (mii_bus:phy_addr=2188000.ethernet-1:00, irq=POLL)
[ 27.429448] IPv6: ADDRCONF(NETDEV_UP): eth0: link is not ready
[ 29.607205] fec 2188000.ethernet eth0: Link is Up – 100Mbps/Full – flow control off
[ 29.607586] IPv6: ADDRCONF(NETDEV_CHANGE): eth0: link becomes ready
while new revision of PCB with old firmware supporting single PHY iC shows following:
root@OpenWrt:/# dmesg | grep Micrel
root@OpenWrt:/#
root@OpenWrt:/# dmesg | grep PHY
[ 7.621421] Generic PHY 2188000.ethernet-1:00: attached PHY driver [Generic PHY] (mii_bus:phy_addr=2188000.ethernet-1:00, irq=POLL)
[ 26.717867] Generic PHY 2188000.ethernet-1:00: attached PHY driver [Generic PHY] (mii_bus:phy_addr=2188000.ethernet-1:00, irq=POLL)
root@OpenWrt:/# dmesg | grep fec
[ 0.669288] fec 2188000.ethernet: 2188000.ethernet supply phy not found, using dummy regulator
[ 0.672927] libphy: fec_enet_mii_bus: probed
[ 0.677198] fec 2188000.ethernet eth0: registered PHC device 0
[ 9.649172] fec 2188000.ethernet eth0: Link is Up – 10Mbps/Full – flow control off
root@OpenWrt:/# dmesg | grep eth
[ 0.669288] fec 2188000.ethernet: 2188000.ethernet supply phy not found, using dummy regulator
[ 0.677198] fec 2188000.ethernet eth0: registered PHC device 0
[ 7.621421] Generic PHY 2188000.ethernet-1:00: attached PHY driver [Generic PHY] (mii_bus:phy_addr=2188000.ethernet-1:00, irq=POLL)
[ 7.622137] IPv6: ADDRCONF(NETDEV_UP): eth0: link is not ready
[ 9.649172] fec 2188000.ethernet eth0: Link is Up – 10Mbps/Full – flow control off
[ 9.649244] IPv6: ADDRCONF(NETDEV_CHANGE): eth0: link becomes ready
[ 26.717867] Generic PHY 2188000.ethernet-1:00: attached PHY driver [Generic PHY] (mii_bus:phy_addr=2188000.ethernet-1:00, irq=POLL)
[ 26.718534] IPv6: ADDRCONF(NETDEV_UP): eth0: link is not ready
root@OpenWrt:/# dmesg | grep Micrel

[ 26.717867] Generic PHY 2188000.ethernet-1:00: attached PHY driver [Generic PHY] (mii_bus:phy_addr=2188000.ethernet-1:00, irq=POLL)
[ 26.718534] IPv6: ADDRCONF(NETDEV_UP): eth0: link is not ready

seems that MAC controller detected PHY IC on MDIO bus but unable to recognize it as KSZ8081. Probably some issue with MDIO bus.

Step 2. U-boot.

If something broken under OS check if it works in bootloader:

Hit any key to stop autoboot: 0
=> setenv ipaddr 192.168.0.99
=> setenv ethaddr 00:11:22:33:44:55
=> ping 192.168.0.100
Using FEC0 device
host 192.168.0.100 is alive

Problematic device able to link under U-boot!

Let’s try to find any difference between working and problematic devices using mii command.

=> help mii
mii – MII utility commands
Usage:
mii device                                                        – list available devices
mii device   <devname>                                – set current device
mii info       <addr>                                         – display MII PHY info
mii read      <addr> <reg>                             – read MII PHY <addr> register <reg>
mii write     <addr> <reg> <data>                – write MII PHY <addr> register <reg>
mii modify <addr> <reg> <data> <mask> – modify MII PHY <addr> register <reg>
updating bits identified in <mask>
mii dump <addr> <reg>                                – pretty-print <addr> <reg> (0-5 only)
Addr and/or reg may be ranges, e.g. 2-7.
=> mii device
MII devices: ‘FEC0’
Current device: ‘FEC0’
=> mii info
PHY 0x00: OUI = 0x0885, Model = 0x16, Rev = 0x01, 100baseT, FDX
PHY IC is detected. Here 0x00 is device address, 0x5043 – Organizationally Unique Identifier, 0x16 – IC Model, 0x01 – revision.
Let’s check registers content. The standard MII features a small set of registers. By opening KSZ8081’s datasheet (page 26) meaning and description each of them might be found.

Dumping  of each register on working devices shows that:

  • 0h – Basic Control   –  selected speed is 100 Mbps and Auto-negotiation process enabled
=> mii dump 0 0
0. (3100)                                      — PHY control register —
(8000:0000)  0.15     =        0     reset
(4000:0000)  0.14     =        0     loopback
(2040:2000)  0. 6,13 =   b01     speed selection = 100 Mbps
(1000:1000)  0.12     =        1     A/N enable
(0800:0000)  0.11     =        0     power-down
(0400:0000)  0.10     =        0     isolate
(0200:0000)  0. 9      =        0     restart A/N
(0100:0100)  0. 8      =        1     duplex = full
(0080:0000)  0. 7      =        0     collision test enable
(003f:0000)  0. 5- 0  =        0      (reserved)
  • 1h – Basic Status – PHY IC 100Base full/half, 10Base full/half capable, Auto-negotiation completed and link is Up.
=> mii dump 0 1
1. (786d)                             — PHY status register —
(8000:0000)   1.15     =    0       100BASE-T4 able
(4000:4000)   1.14    =     1      100BASE-X full duplex able
(2000:2000)   1.13    =     1      100BASE-X half duplex able
(1000:1000)   1.12    =     1      10 Mbps full duplex able
(0800:0800)   1.11    =     1      10 Mbps half duplex able
(0400:0000)   1.10    =     0      100BASE-T2 full duplex able
(0200:0000)   1. 9    =      0      100BASE-T2 half duplex able
(0100:0000)   1. 8    =      0      extended status
(0080:0000)   1. 7    =      0      (reserved)
(0040:0040)   1. 6    =      1      MF preamble suppression
(0020:0020)   1. 5    =      1      A/N complete
(0010:0000)   1. 4    =      0      remote fault
(0008:0008)   1. 3    =      1      A/N able
(0004:0004)   1. 2    =      1      link status
(0002:0000)   1. 1    =      0      jabber detect
(0001:0001)   1. 0    =      1      extended capabilities
  • 2h, 3h – PHY Identifier 1 and PHY Identifier 2 – Manufacturer part number is 0x16 and silicon revision number is A3
=> mii dump 0 2
2.            (0022)                                  — PHY ID 1 register —
(ffff:0022)      2.15-  0  =       34          OUI portion
=> mii dump 0 3
3.            (1561)                                 — PHY ID 2 register —
(fc00:1400)   3.15-10   =       5           OUI portion
(03f0:0160)   3. 9- 4     =       22         manufacturer part number
(000f:0001)   3. 3- 0     =       1           manufacturer rev. number

while problematic device shows:

=> mii dump 0 2
2.            (0020)                                  — PHY ID 1 register —
(ffff:0022)      2.15-  0  =       0           OUI portion
=> mii dump 0 3
3.            (0020)                                 — PHY ID 2 register —
(fc00:1400)   3.15-10   =       0           OUI portion
(03f0:0160)   3. 9- 4     =       2          manufacturer part number
(000f:0001)   3. 3- 0     =       0           manufacturer rev. number

What is an issue? Counterfeit IC? After hours spent in thought, googling and reading datasheet discovered:

“…This pin (MDIO) has a weak pull-up, is opendrain, and requires an external 1.0 kΩ pull-up resistor….” .  Might it be an issue? Don’t know. Let’s check it.

After soldering pull up resistor:

OpenWrt driven SoM

to our great relief found that PHY IC taken IP address!

Time to solder second PHY IC (left top corner on the photo). Done. Holding my breath I supply power and see that non of them takes IP address. Again.

To be continued.